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Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling Ayan Mandal 2014 edition
Source-Synchronous Networks-On-Chip: Circuit and Architectural Interconnect Modeling
Ayan Mandal
This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.
160 pages, 85 black & white illustrations, 10 colour illustrations, 21 black & white tables, biograp
| Mídia | Livros Hardcover Book (Livro com lombada e capa dura) |
| Lançado | 14 de novembro de 2013 |
| ISBN13 | 9781461494041 |
| Editoras | Springer-Verlag New York Inc. |
| Páginas | 143 |
| Dimensões | 155 × 235 × 15 mm · 340 g |
| Idioma | Inglês |