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Switch-Level Timing Simulation of MOS VLSI Circuits - The Springer International Series in Engineering and Computer Science 1989 edition
Vasant B. Rao
Switch-Level Timing Simulation of MOS VLSI Circuits - The Springer International Series in Engineering and Computer Science 1989 edition
Vasant B. Rao
Only two decades ago most electronic circuits were designed with a slide-rule, and the designs were verified using breadboard techniques. Today a wide range of tools exist for analYSiS, deSign, and verification, and expert systems and synthesis tools are rapidly emerging.
210 pages, biography
Mídia | Livros Hardcover Book (Livro com lombada e capa dura) |
Lançado | 30 de novembro de 1988 |
ISBN13 | 9780898383027 |
Editoras | Kluwer Academic Publishers |
Páginas | 210 |
Dimensões | 156 × 234 × 14 mm · 489 g |
Idioma | English |
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