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Yield Simulation for Integrated Circuits - The Springer International Series in Engineering and Computer Science 1987 edition
D.M. Walker
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Yield Simulation for Integrated Circuits - The Springer International Series in Engineering and Computer Science 1987 edition
D.M. Walker
Since only half the chip area would have redundancy, I was concerned that the increase in yield would not outweigh the increased costs of testing and redundancy programming. I wanted a simulator that would allow me to evaluate the yield of arbitrary redundant layouts, hence I termed such a simulator a layout or yield simulator.
209 pages, biography
| Mídia | Livros Hardcover Book (Livro com lombada e capa dura) |
| Lançado | 30 de setembro de 1987 |
| ISBN13 | 9780898382440 |
| Editoras | Kluwer Academic Publishers |
| Páginas | 209 |
| Dimensões | 156 × 234 × 14 mm · 512 g |
| Idioma | English |
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